Continuous time (CT) sigma delta modulators can operate at a higher sampling frequency than their discrete time (DT) counterparts.
FIG. 1 shows a continuous time sigma delta analog to digital converter according to the state of the art. Continuous time sigma delta analog to digital converters (CT ΣΔ ADC) are widely employed in wireless communication receivers as well as in sensor interfaces. The continuous time sigma delta analog to digital converter according to the state of the art as shown in FIG. 1 comprises two major components, i.e. a loop filter and a quantizer.
FIG. 2 shows the loop filter of the conventional analog digital converter in more detail. As can be seen from FIG. 2, the loop filter according to the state of the art includes a number of integrator elements which are connected in series to each other. The output signal of each integrator element is fed to the input of the next integrator element. Further, the output signal of each integrator element may be coupled via a feed-forward branch (Ci) to a summing point at the output of the loop filter. In some loop filters, also feed-back branches are provided. As shown in FIG. 2 the loop filter of the conventional continuous time sigma delta analog to digital converter comprises an input terminal and receives the fed-back digital output signal of the analog-digital converter ADC comprising m bits. The digital output signal is supplied to at least one digital-analog converter (DAC1) which converts the feed-back digital output signal to an analog signal which is subtracted from the analog input signal of the analog-digital converter (ADC). Further, digital-analog converters (DAC2 . . . DACn) can also be implemented into the loop filter as shown in FIG. 2. In the example given in FIG. 2, the conventional loop filter comprises n−1 integrator stages and n digital-analog converters. The order of the loop filter is n−1. In conventional continuous time sigma delta analog to digital converters filters having a filter order ranging from 2 to 7 are normally employed. The loop filters used in the continuous time sigma delta analog to digital converter as shown in FIG. 1 has an open loop gain which is necessarily higher than one.
The transfer function of the loop filter as shown in FIG. 2 is defined by the ratio of the analog output signal of the loop filter (Uf) and the digital input signal (Uoutdig). For each pole of the loop filter transfer function, an integrator element is employed requiring an active device.
Whereas passive filters are built from passive components such as resistors, capacitors and inductors, active filters do not include inductors. Active filters also use resistors and capacitors, but the inductors are replaced by active devices capable of producing a power gain. These active devices can range from simple transistors to integrated circuits (IC), controlled sources such as operation amplifiers (op amps) and operational transconductance amplifiers (OTA), generalized impedance converters (GIC) and frequency-dependent negative resistors (FDNR).
The voltage transfer function (VTF) is specified in the frequency domain. The poles of the VTF correspond to the roofs of its denominator polynomial. For each pole of the voltage transfer function VTF, the loop filter according to the state of the art as shown in FIG. 2 employs an active device such as an operation amplifier or an operational transconductance amplifier (OTA). For each zero of the voltage transfer function (VTF) of the loop filter, either a feed-forward branch (CI) or a feed-back digital-analog converter DAC is provided. In some loop filters, according to the state of the art, the feed-forward branches (CI) are built in those active elements such as voltage to current converters.
The higher the filter order of the filter, the greater is the selectivity of said filter. To achieve a certain filter selectivity, it is necessary to employ a loop filter with a certain filter order. When employing a loop filter according to the state of the art as shown in FIG. 2, the number of active devices provided within said loop filter is equal or even higher than the chosen filter order.
Since each active device consumes power, the power consumption of the analog-digital converter according to the state of the art as shown in FIG. 1 is increased with the filter order of the loop filter. Accordingly, a drawback of conventional continuous time sigma delta analog to digital converters according to the state of the art as shown in FIG. 1 is that the power dissipation of such a conventional analog-digital converter is high.
Consequently, it is the object of the present invention to provide a loop filter for a continuous time sigma delta analog to digital converter which minimizes the power dissipation of the analog-digital converter.
This object is achieved by a loop filter having the features of main claim 1.